13 Nov 2026

Approaches to AI across semiconductors, photonics, and embedded systems

Approaches to AI across semiconductors, photonics, and embedded systems

It is one of the safer bets around to state that AI is reshaping the entire microelectronics ecosystem; indeed, at Microelectronics UK in September, you would have done well to find a session where those two letters weren’t used at some point. Dig a little deeper, however, and each of the three main stages had presentations which gave fascinating insight on the how, but also the why and when.

Andy Sellars, director of strategy at Cornerstone, gave a broad overview addressing the AI challenge to attendees at the Photonics UK stage, encompassing wider semiconductor positioning and domestic manufacturing capability. Sellars opened outlining a House of Lords study on semiconductors which found the UK has strengths in IP and R&D, but also found a fragmented ecosystem, a skills shortage, and a funding gap for scale-up. The year of this study? 2002.

While the more some things change, the more they may stay the same, plenty has gone in the right direction since then, from the UK Semiconductor Centre to the Semiconductor Catapult. Sellars explored the value captured and upcoming trends to see where the UK could align. Alongside edge AI and quantum, Sellars outlined neuromorphic computing as a particularly interesting space. “Clearly, if we’re going to scale AI, we need to be learning things from how the brain processes data,” he said.

Sellars emphasised the recent message from the Photonics Leadership Group that the integration of photonics was a ‘once-in-a-lifetime’ opportunity. Again, taking lessons from the past, where discrete transistor devices moved towards integrated circuits, Sellars noted it was ‘interesting that photonics is roundabout the same position in this inflection.’

“At the moment, we have a situation where we’re doing experiments with discrete optics… moving towards integrated optics,” said Sellars. “That will drive consistency and mass production [and] also provide IP blocks. This really is the sweet spot where we can derive value.”

Will photonics follow the same trajectory as semiconductors, where specialists emerged in design, IP and packaging? That remains up for debate, Sellars said, but with photonic integrated circuits (PICs), there are clearly multiple materials that can be used, each tailored to specific applications.

The long list of market opportunities for PICs starts with optical transceivers and optical interconnect on the more mature side, moving through to LIDAR, biosensing and medical diagnostics, through to quantum and neuromorphic computing. But how do we turn this potential into reality? Sellars outlined an example aligning with the government strategy of reindustrialising the economy which ‘really resonates… from a deep tech manufacturing perspective’, as well as integration with academia, creating a virtuous circle.

Almost a quarter (22%) of the regional gross value added, representing the photonics cluster in Southampton, could be traced to companies that have spun out from the University of Southampton, where Cornerstone is based. “I think the reason for that is that the academics at the university are predominantly solving manufacturing problems,” said Sellars, citing hollow core fibre as an example. “Once that technology has been developed, the company that’s going to commercialise that will not go the other side of the world,” added Sellars. “It’ll go on the doorstep because they need access to the academics.”

Meanwhile, on the Semiconductors UK stage, Rod Metcalfe, senior group director at Cadence, outlined the process of developing AI super agents to accelerate chip design. In some ways, AI is no different to what came before. “Over the past 40 years, we have been increasing productivity through abstraction,” explained Metcalfe. “We’ve made the design process more abstract; that’s given us production benefits, and also, we need the underlying solving engines. You can’t do everything by abstraction, so we’ve been developing the solvers to help us do placement and routing.

“So, really, I think that AI technology is just the next evolution of this,” added Metcalfe. “We can take the abstraction level even higher.”

Instead of designers writing RTL (register-transfer level), Metcalfe explained, design specifications can be automatically read, and the RTL created, directly from it. Instead of just having solving engines, machine learning can be added to give predictive capabilities. GPUs can accelerate different parts of the design flow. Yet using AI – or LLMs – to complete the final placement of a five-million cell design is very inefficient. Metcalfe noted how Cadence was therefore taking a layered approach, from the compute layer, to the underlying products, to the agentic AI layer orchestrating the flow.

Adding agentic AI to EDA requires a ‘fundamentally different’ approach to previously. Metcalfe told attendees that Cadence was attacking this problem through what it called the ‘agent stack environment’, which enables subdivision of chip design into multiple different areas, from verification, to digital design flow, to PCB, to multi-physics. All the stacks connect to an infrastructure layer, JedAI (Joint Enterprise Data and AI Platform) with security in mind – a single point to control access to LLM resources, preventing accidental data leakage.

A whole interconnected system of resources helps get to the final silicon design. “You’re now interacting with the tool at a much higher level,” explained Metcalfe. “You describe the task you want it to perform, and then the agentic system will gather the information and generate a result.”

The end of Metcalfe’s session saw a video showing how to quickly design a chip using a super agent. One agent first builds the flow, then creates a floor plan, before another agent is spun up to optimise the design for reduced power consumption. The key is self-correction. “The agent is managing not only… the design, but correcting it as we go through the flow,” explained Metcalfe.

Going back to edge AI, on the Embedded Systems UK stage, Amar Abid-Ali, CEO at Novomorphic, outlined his company’s vision of system-first, secure edge AI solutions.  “The major challenge you have when you design an edge AI system is actually the systematic elements rather than the edge AI inference device itself,” said Abid-Ali.

Noting the energy aspect of edge AI is where some of the biggest problems reside, Abid-Ali noted that with far edge devices, a ‘wall of challenges’ exist, from tight latency budgets, to connectivity compared with cloud environments or own sites, to physical security.

Starting with a more traditional component-first architecture ‘is going to lead you at the end to choose what that component is allowing you to do, and you’re architecting everything around it, which will then become your bottleneck’, Abid-Ali explained.

“What we’re suggesting is actually look at what the mission is – what is it trying to do first?” he said. “How long does it need to do it for? What is it supposed to achieve with that, and who is it protecting against? Who has physical access to this stuff in order for bad actors to do damage?” With a budget across security and safety, performance, energy and cost, you are ‘looking at a mission with an engineering restriction that you can then design against’ – in other words, looking at things from a systematic level.

Security is not a single layer, as Novomorphic sees it, but more complex across multitudes of architecture and supply chain steps. “The security never actually breaks on the device itself,” added Abid-Ali. “That’s not usually where you see the issue. The issue is the boundaries between them.” Abid-Ali cited the major SolarWinds attack in 2020 as an example of this in action, but added there are lots of different examples. “Which is why it’s so important that when we look at an edge device, we don’t look at it in isolation from the system it operates in,” he said.

There were five key takeaways from Abid-Ali’s session: start with the system requirements; design security from day one; make sure you balance security with performance and power; look at the architecture beating the component design; and, finally, system-first will accelerate deployment.

“We think that the next generation edge AI will be won by system architects – thinking through the system level first, rather than the TOPS that you have on your inference device,” said Abid-Ali.

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